@article {18012,
	title = {Case study of gate-level logic simulation on an extremely fine-grained chip multiprocessor},
	journal = {Journal of Embedded Computing},
	volume = {2},
	year = {2006},
	month = {2006/01/01/},
	pages = {181 - 190},
	abstract = {Explicit-multi-threading (XMT) is a parallel programming approach for exploiting on-chip parallelism. Its fine-grained single program multiple data (SPMD) programming model is suitable for many computing intensive applications. In this paper, we present a parallel gate level logic simulator implemented on an XMT platform and study its performance. Test results show potential for achieving more than a hundred-fold speedup over a serial implementation. This indicates an interesting possibility for a certain type of a single chip multicore architecture: use an existing easy-to-program API, such as VHDL or Verilog, for reduced application-software development time and better performance over serial performance-driven languages, such as C.},
	url = {http://iospress.metapress.com/content/1E5MJUMCQL6VCHJW},
	author = {Gu,Pei and Vishkin, Uzi}
}
